Category: Memory
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Samsung and AMD tighten HBM4 planning around rack-scale AI systems. Their expanded agreement links next-generation high-bandwidth memory supply to future Instinct accelerators, where bandwidth, packaging, power, and platform integration are now moving together.
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Mythic is hardening analog AI around foundry-ready embedded memory technology. Its next APU generation will use SST’s memBrain and SuperFlash to push compute-in-memory efficiency further into deployable silicon.
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Everspin Technologies has completed production qualification of its 64Mb high-reliability xSPI MRAM, extending the use of persistent memory in industrial, medical, aerospace, and other applications requiring robust operation under extreme conditions.
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Intelligent Memory is reviving low-density eMMC for long-life industrial designs. The company has launched 8GB and 16GB industrial eMMC in a 153-ball BGA package, aiming to keep embedded platforms supplied as mainstream vendors reduce legacy capacity options.
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Innodisk has introduced a CXL add-in card for edge servers. The PCIe Gen 5 x8 card supports CXL 2.0 Type 3 and scales DDR5 capacity to 256 GB without using DIMM slots.
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AI data centres are turning NAND into a scarce resource. Phison is warning of a 2026 squeeze as enterprise SSD demand accelerates for inference, vector search, and cold-tier storage. With suppliers prioritising margin and process transitions limiting bit growth, embedded buyers may find eMMC and UFS harder to source.
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Samsung has begun shipping HBM4 memory for AI accelerators commercially. The company says production uses a 10 nm-class DRAM process with a 4 nm logic base die, delivering 11.7 Gbps per pin, up to 3.3 TB/s per stack, and 24–36 GB capacities.
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EnSilica joins the CHERI Alliance to harden custom ASICs today. The mixed-signal supplier says it will use CHERI capability-based hardware techniques to strengthen memory safety for automotive and industrial silicon.
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SK hynix is accelerating capacity as HBM demand tightens again. The company is expanding near-term output via M15X and progressing its Yongin cluster plan, with the first fab scheduled for completion in May 2027 and designed to produce next-generation DRAM, including HBM.