Category: Processors
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Synopsys has released Multiphysics Fusion tools for chip design closure. The flows integrate timing, power, thermal, electromagnetic, multi-die, analogue, and photonic analysis.
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AMD and Rackspace are scaling dedicated compute for enterprise AI. The 30MW rollout combines Instinct GPUs and EPYC CPUs for governed workloads.
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Microchip’s Nantes facility now supports tougher aerospace semiconductor qualification demands. Class Y capability strengthens advanced packaging routes for aerospace and defence devices.
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Menta and Presto are taking reconfigurable logic into ASIC flows. Their collaboration pairs embedded FPGA IP with industrialisation support for long-lifecycle semiconductor programmes.
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Quobly has raised €115m for silicon quantum computing systems development. The funding supports 300mm wafer processes, FD-SOI technology, and a full-stack architecture spanning qubits, control electronics, and software.
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Analogue Insight has opened engagement for low-power 32Gbps interconnect IP. The design targets co-packaged optics and silicon photonics.
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CEA-Leti has demonstrated denser 22nm FeRAM using vertical HZO capacitors. The work targets embedded non-volatile memory for edge AI.
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Imec, ASML, and TSMC have demonstrated industry-scale 2D transistor integration. The 300mm work points beyond silicon logic scaling.
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Altera is now sampling Agilex 9 Direct RF-Series SoC FPGAs. The devices integrate converters, programmable logic, processing, memory, and RF capability.
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Siemens and Samsung Foundry are extending advanced-node EDA collaboration flows. The work covers verification, test, packaging, analogue, RF, and implementation.