Siemens advances pre-silicon AI verification to trillion-cycle prototype workloads faster.
Safe and Secure targets critical infrastructure with auditable processor security.
IBASE has launched an AI-ready eATX board for edge deployments. Built around AMD EPYC Embedded 8004 processors, the MBB1002 targets smart manufacturing, transport, and AIoT systems needing dense PCIe Gen5 expansion and ECC memory.
Abaco Systems has launched the VP892, a rugged 3U VPX FPGA engine built around AMD’s VU13P, extending compute density, bandwidth, and programme life for demanding defence and industrial embedded platforms.
Microchip has introduced a hybrid MCU SiP for HMIs today. The automotive-qualified device combines an Arm926EJ-S processor and DDR2 memory in a single package.
Intel has posted new MLPerf inference benchmark results this week. The latest submission highlights Xeon 6 and Arc Pro B-Series scaling across workstation, edge, and datacentre inference workloads.
CEA and PSMC are combining photonics, RISC-V, and 3D packaging. The tie-up brings silicon photonics, microLED links, and open compute IP into interposer-based AI architectures aimed at easing bandwidth and power constraints.
Rambus has launched new HBM4E controller IP for accelerator designs. The block targets AI and HPC devices that need much higher memory bandwidth, with early-access licensing now open.
Infineon is packing more current into the AI power stage. Its latest TLVR module targets the growing board-level constraints inside AI servers, where power density, transient response, and thermal headroom are becoming central design limits.