Category: Design engineering
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Atomera is targeting RF GaN-on-silicon performance with MST processing. The approach uses an oxygen-modified silicon layer to reduce parasitic channel charge, aiming to narrow the performance gap between lower-cost silicon substrates and established RF GaN-on-SiC platforms.
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Astute Group has added UK stock of ATS thermal management products for NVIDIA Jetson modules. The range covers active heatsinks, passive options, and thermal transfer plates for robotics, edge computing, smart monitoring, and physical AI systems.
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JEDEC has released JEP203 and JEP204 for silicon carbide power semiconductors. The documents cover short-circuit evaluation and stress procedures, supporting more consistent qualification of SiC devices in EVs, industrial drives, renewable systems, and high-power electronics.
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QPT has opened customer demonstrations of MicroDyno. The GaN motor-drive platform now adds field-oriented control, dynamic cogging correction, digital-twin modelling, and edge-AI fault detection.
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Cadence has extended ChipStack to Level-5 autonomy. The AI Super Agent uses NVIDIA technology to automate chip design and verification workflows across simulation, formal analysis, debug, and convergence.
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Siemens has developed an AI data-centre reference design. The architecture covers electrical distribution, controls, modular power blocks, storage integration, and scalable deployment for NVIDIA Vera Rubin NVL72 infrastructure.
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A.R.T. and Space East will host a UK space-electronics event.
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Pickering will show EV test systems for battery electronics validation.
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Frenetic has appointed SZ Dore to support Asian magnetics customers.
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Nikon is preparing lower-cost ArF tools for semiconductor manufacturing markets.