ASMPT has developed placement hardware for heavy AI processor packages. Its SOLO head handles BGAs measuring up to 240 × 240 mm and initially weighing more than 2 kg, with an increase towards 5 kg planned.
Navitas expands 2,300 V SiC modules with new connection options. The 21 October announcement adds higher-current press-fit variants and pre-applied thermal interface material to an 8 mΩ module already listed for sampling in April.
Four Japanese companies will develop manufacturing processes for optical chiplets. The NEDO-backed programme combines photonic device production, silicon photonics and advanced packaging, targeting a pilot line and substantially greater manufacturing productivity.
TAIYO YUDEN adds extensive component data within Cadence OrCAD X. The integration makes characteristics for approximately 10,000 capacitors and inductors available within an established PCB design environment, supporting component selection and circuit simulation.
Neumonda will demonstrate coordinated DRAM testing at electronica this November. Its established Raptor, Octopus and Rhinoe platforms will be presented as a complementary test workflow covering high-speed operation, endurance and signal integrity.
Amsterdam venture EpoQ has won PhotonDelta’s global photonics engineering competition. The reported winning proposal uses integrated photonics for a trapped-ion atomic clock, with access to development services and a conditional investment opportunity.