Category: News
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Microchip has launched 1.2V clock buffers for modern processor rails. SY757xx combines level translation with additive jitter as low as 26fs.
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Arm has expanded Total Design into physical AI development ecosystems. Its six-level robotics framework aims to give autonomous systems a common capability language.
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Arm has expanded Neoverse with its configurable CSS N4 platform. The subsystem supports 128 cores, LPDDR6 memory, and PCIe Gen 7.
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French researchers have combined memristors and SMTJs for hardware optimisation. The architecture uses device-level randomness to implement intrinsic annealing during its search.
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SEMI wants Chips Act 2.0 support across Europe’s semiconductor chain. Nine proposals address investment, operating costs, governance, resilience, and workforce capacity.
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SYSGO has added PikeOS support to Kontron’s rugged VX3060 platform. The validated BSP targets mixed-criticality systems across defence, transport, and industrial automation.
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Intel says High-NA EUV now supports selected volume-production layers today. More than one million wafers span certification, development, and manufacturing activity.
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Samsung plans High-NA EUV insertion into DRAM production by 2028. It is also joining development of a larger 12-inch photomask platform.
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Infineon has integrated traction-inverter power management and safety functions together. TLE9744QK also incorporates resolver excitation and independent fault supervision.
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Imec has pushed CAR resists to 22nm-pitch High-NA EUV patterning. The single-exposure work also reaches 28nm-spaced vias for A14/A10 logic.