Category: Design engineering
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FC Lane now stocks Cinch-Fibreco rugged fibre adapters for engineers. JCON Junior connects an M83526-compliant expanded-beam interface to standard fibre patchcords for harsh-environment equipment.
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AI infrastructure is pulling optical links closer to compute silicon. That shift is changing decisions around materials, packaging, thermal management, manufacturing, and test.
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Researchers built an open platform for automated embedded power testing. The Raspberry Pi-based system coordinates firmware flashing, device execution, and current measurement at around 1,200Hz.
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D-Wave has demonstrated an error-detecting gate for scalable quantum architectures. The operation achieved approximately 99.9% fidelity while retaining dual-rail error detection.
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Samsung has presented vertical memory concepts for future AI systems. zHBM places memory above accelerators, while zNAND-O targets dense, low-latency edge storage.
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Molex has combined power and Ethernet within one miniature connector. MiniMix targets compact robotic joints where separate interfaces complicate routing and assembly.
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IonQ will install commercial quantum memory within an operational network. The Chattanooga programme will test storage hardware against the practical constraints of live fibre infrastructure.
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Thales has launched Luna 8 for post-quantum security infrastructure deployment. The network appliance adds native algorithms, isolated instances, and an upgradeable hardware architecture.
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Palomino has completed its acquisition of interconnect developer Vega Links. The combined company plans copper and optical chipsets for expanding AI clusters.
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Microchip and Micron linked PCIe 6 switching with production SSDs. The FMS demonstration targets scalable storage for AI, cloud, and high-performance computing systems.