Category: Memory
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NEO has combined two memory concepts for future AI processors. X-SRAM targets denser on-chip storage while 3D X-DRAM addresses external memory capacity.
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Microchip and Micron linked PCIe 6 switching with production SSDs. The FMS demonstration targets scalable storage for AI, cloud, and high-performance computing systems.
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SK hynix and Sandisk have published initial HBF interface specifications. Capacities reach 512GB while three bandwidth grades span approximately 0.4TB/s to 3.0TB/s.
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UD Info has introduced configurable memory cards for industrial systems. The range combines firmware customisation, fixed bills of materials, health monitoring, and wide-temperature pSLC options, with samples available during August.
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Renesas has raised DDR5 MRDIMM bandwidth to 16,000MT/s for servers. The third generation chipset targets AI and high performance computing platforms while retaining established DDR5 infrastructure.
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Innodisk has introduced 12,800MT/s DDR5 MRDIMMs for modern AI servers. Multiplexed rank access increases bandwidth without replacing the established DIMM form factor.
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Infineon flash has qualified for ASPEED’s latest server management controller. Approved vendor status gives AST2700 designers validated BMC firmware storage.
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SK hynix has begun shipping HBM4 during another record quarter. HBM4E samples, sixth generation DRAM, and 321 layer NAND extend its AI memory roadmap.
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Astute has added UTA modules as memory shortages spread upstream. The agreement gives embedded developers additional cellular and positioning options during constrained supply.
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Samsung and Broadcom are aligning memory, foundry, and packaging roadmaps. Their expanded agreement joins HBM supply with advanced-node manufacturing and heterogeneous integration.