IBM is designing a processor supporting native Arm and Z. The 2 nm chip contains 11 cores above 5.7 GHz while executing both instruction architectures within each core.
Achronix has released JESD204C IP for high-bandwidth Speedster7t FPGA systems. The core supports 32 Gbps lanes, deterministic latency, and aggregate serial throughput reaching 1 Tbps.
Infineon is supplying CoolSiC MOSFETs for Fox ESS storage systems. The 1200 V devices cut switching losses by 70%, lifting PQ3-Ultra peak inverter efficiency to 98.78%.
Teledyne FLIR will develop next-generation thermal sensors for US Army. The DUTCH programme targets better uncooled imaging performance, lower SWaP-C, and scalable domestic production.
ROHM has expanded availability of fourth-generation 650V automotive IGBTs globally. The family combines lower conduction loss, short-circuit tolerance, and AEC-Q101 qualification for auxiliary vehicle and industrial drives.
Texas Instruments has released multiaxial sensing for traction inverter applications. TMCS2100-Q1 combines coreless construction with two-axis magnetic measurement to reduce displacement and crosstalk errors.
Navitas will acquire Claros to extend processor-level power delivery capabilities. The deal adds vertical regulation, mixed-signal design, digital control, and advanced packaging expertise for increasingly power-dense AI processors.
Primemas has detailed rack-scale CXL memory for demanding PNNL workloads. The Abaco project combines high-density controller silicon, Micron DDR5, and memory pooling to exceed 100TB per rack.